The problem IMPSPRGM solves
A typical battery-powered telemetry node pairs a GSM/GPRS modem (for uplink) with a low-power MCU (for the real-time logic). The modem has a powerful 32-bit core, megabytes of flash, a TCP stack, Bluetooth and a large heap — but most of that silicon sits idle between radio windows. The MCU, meanwhile, is starved: it has to add an external EEPROM for keys, an extra Bluetooth chip for pairing, a hand-rolled floating-point library for the calibration curve, and a second clock domain to coordinate with the modem over AT-commands.
IMPSPRGM collapses this picture into one board and one project. The modem and the MCU run cooperating halves of the same program. Each chip is used at up to 100% of its capacity, and the host side no longer needs the extra memory chip, the extra radio, or the FPU emulation.
Reference silicon
The architecture is generic, but IMPSPRGM has been validated on the pair below, which is representative of a low-cost IoT node.
| Property | SIM800C · SIMCom | STM8 · STMicroelectronics |
|---|---|---|
| Core | 32-bit ARM (baseband SoC); runs SIMCom RTOS | 8-bit STM8 (Harvard, 3-stage pipeline) |
| Clock · throughput | Hundreds of MHz internally; MAC unit and fast integer math | Up to 24 MHz · up to 20 MIPS; no hardware FPU |
| Flash | Module contains the GSM firmware + a large user-code partition available via EAT | 4 KB – 96 KB depending on part (STM8S, STM8L) |
| RAM | Multiple MB region visible to EAT tasks | 1 KB – 6 KB |
| EEPROM | File-system on internal flash (EAT FS API) | 128 B – 2 KB, 300 000 erase cycles |
| Radio | Quad-band GSM 850/900/1800/1900, GPRS class 10/12, Bluetooth 3.0 (SPP/HFP/HSP) | — |
| Sleep | ≈ 0.6 mA in Sleep Mode 1 (AT+CSCLK=1), wake via DTR / RI / GPIO / UART | Halt ≈ sub-µA; Active-Halt keeps RTC |
| User-programmable runtime | EAT (Embedded AT): multi-thread C apps sharing the module's scheduler, AT stack, TCP/UDP sockets, Bluetooth profiles, DNS, SMS, file system, flash writer | Bare-metal C / SDCC / Cosmic |
Sources: SIM800C Hardware Design v1.02 (SIMCom); SIM800 Series Embedded AT Application Note v1.03; SIM800 Series Bluetooth Application Note v1.04; STM8 Wikipedia article; STMicroelectronics STM8S product page.
Architecture at a glance
The key decision in the design is that there is no master. Both cores run continuously, each with its own scheduler and its own interrupt stack. Instead of a master-slave UART dialog, IMPSPRGM exposes three logical buses that ride on the same physical link.
Bus 1 · Commands
A fixed, compact opcode table shared by both sides. An opcode is an architecture-neutral abstract instruction — READ_GPIO, WRITE_REG, SLEEP(ms), SOCKET_SEND. Each side implements the subset it can actually serve. This lets the same higher-level code run regardless of where the physical resource lives: when STM8 asks for SOCKET_SEND, the Translator routes it to the SIM800C; when SIM800C asks for READ_ADC(ch=3), the Translator routes it to STM8.
Bus 2 · Procedures
Remote procedure calls with typed arguments and a return value. This is how computation crosses the chip boundary. A procedure declared once (e.g. hmac_sha256(key_id, buf, len) → tag[32]) can be invoked from either side; the IMPSPRGM Translator marshals the arguments, routes them over the physical transport, schedules the callee in the caller's priority class, and returns the result. The caller blocks or takes a callback — like an OS system call.
Bus 3 · Interrupts
Asynchronous events: radio URCs, pulse-counter overflow on the water meter input, low-battery alarm, incoming Bluetooth pairing request. The IRQ bus delivers a short token (event id + 1–8 bytes of payload) and immediately releases the physical line. The receiving side either runs the handler inline or wakes the relevant task.
Translator
A small piece of firmware (identical binary logic on both cores, compiled for each ISA) that:
- arbitrates the physical transport (half-duplex UART with a framing layer);
- maps abstract opcodes and procedure IDs to local function pointers;
- preserves ordering per-bus (Commands FIFO, Procedures priority queue, Interrupts pre-emptive);
- tracks remote stacks so that a blocking call on one side suspends only the calling task, not the whole core.
Physical transport
In the reference design the three logical buses multiplex onto:
- One UART (
STM8 UART1 ↔ SIM800C UART1, 115 200 Bd with hardware flow controlAT+IFC=2,2). Both directions carry framed packets with a 4-bit bus tag, a 12-bit length, an opcode/proc-id byte, the payload, and a CRC-16. - One GPIO IRQ line (STM8 → SIM800C DTR, and SIM800C GPIO → STM8 EXTI). Pulling DTR low wakes the SIM800C from Sleep Mode 1 in ≈ 50 ms, so the STM8 can keep the modem in standby between uplinks. A symmetric line lets the SIM800C wake the STM8 from Halt when a TCP packet or an SMS arrives.
- Optional shared SPI for bulk transfers (OTA firmware image, bulk-read sensor dumps) — framed the same way, just wider.
Why one UART is enough
The SIM800C's AT port already runs at 115 200 Bd full-duplex. After flow control is enabled, the channel reaches > 90% of line rate for long frames. Since the Procedures bus is request/response and the Interrupts bus only carries short tokens, the average contention is low — the radio-side software spends most of its time waiting on the network anyway.
Sequence example · signing a telemetry packet
In a conventional design, the STM8 would either carry a bulky software HMAC implementation in its 8 KB of flash, or add an external secure element chip. With IMPSPRGM, the STM8 issues one remote procedure call:
// STM8 side — sign the telemetry frame before uplink
uint8_t tag[32];
imp_proc_call(
PROC_HMAC_SHA256, // procedure id, shared across chips
KEY_ID_TELEMETRY, // the SIM800C holds the key in its flash
frame_buf, frame_len, // input
tag, sizeof(tag) // output
);
imp_proc_call(
PROC_TCP_SEND,
SOCKET_UPLINK,
frame_buf, frame_len,
tag, sizeof(tag)
);
imp_cmd(CMD_SLEEP, 30000); // hand control back to Halt for 30 s
What actually happens on the wire:
- STM8 marshals the call into a Procedures-bus frame on UART.
- SIM800C EAT wakes the
cryptothread, looks upKEY_ID_TELEMETRYin its on-module flash file system, runs HMAC-SHA256 on the ARM core (≈ 30–50× faster than on the STM8 software routine). - SIM800C reuses the already-open TCP socket to send the signed packet.
- A return token is sent back; the STM8's
imp_proc_callunblocks. - STM8 enters Halt. Total awake time: a few hundred milliseconds.
Shared resources — what falls off the BOM
The cost story of IMPSPRGM is not "we saved one chip". The SIM800C module is — to the board designer — an astonishingly rich SoC: it is really a 32-bit ARM system with megabytes of flash, a full TCP/IP stack, crypto, Bluetooth, an RTC with independent backup, an ADC, a PWM, an I²C master, an audio codec and a bootloader. In the conventional AT-slave topology, most of this silicon is wasted — the host MCU only gets to speak "send SMS" and "open socket". IMPSPRGM exposes every one of those internal resources to the host program through the Procedures bus, and each resource that becomes shared is one component that can be removed from the PCB. The categories below enumerate, point by point, everything the validation board lost.